The present invention relates to circuitry formed on substrates. More specifically, the present invention relates to arrays.
Lewis, A., and Wu, I-W., "Polysilicon TFTs for Active Matrix Liquid Crystal Displays," IEICE TRANSACTIONS, Vol. J76-C-II, No. 5, May 1993, pp. 211-226, describe fabrication of polysilicon (poly-Si) thin film transistors (TFTs) and poly-Si active matrix liquid crystal display (AMLCD) pixel designs. Section 2.3 describes process flow and device architectures in relation to FIG. 2, which shows TFT device cross-sections. Section 2.6 describes gate materials, indicating that poly-Si gate electrodes have been widely used, but that gate line resistance is difficult to reduce. Cr, ITO, or PtSi are alternatives, and the use of a thin aluminum layer over a conventional poly-Si gate can reduce effective gate line resistance. FIG. 10 shows a schematic of typical AMLCD pixel circuitry, and section 4 discusses poly-Si TFT AMLCD pixel design issues. Of techniques to reduce leakage, the use of multiple gates in a TFT is the simplest; FIG. 11 illustrates the transfer characteristics of TFTs with 1, 2, 4, and 8 gates, all with the same total gate length. Section 5 describes peripheral drive circuits integrated on a glass or quartz substrate with an active matrix, which is the main advantage of poly-Si TFTs over amorphous devices for AMLCDs.
Wu, I-W., "High-definition displays and technology trends in TFT-LCDs," Journal of the SID, Vol. 2, No. 1, 1994, pp. 1-14, describes various liquid crystal displays (LCDs), focusing on AMLCDs with TFTs. Section 3 on page 5 compares amorphous silicon (a-Si) TFT-AMLCDs with poly-Si TFT-AMLCDs. FIGS. 2-5 show general features of conventional TFT-AMLCDs. As described in relation to FIG. 3, TFTs act as switches controlled by gate electrodes, connecting data lines to pixel electrodes. As explained at page 6 last paragraph-page 7 first paragraph in relation to FIGS. 4 and 5, a storage capacitor C.sub.st helps maintain pixel voltage during a frame time. An electrode of C.sub.st can be connected either to a previous gate line or to an independent conductive line to which an appropriate dc voltage is applied; a low-resistance gate-line is desired to minimize adverse effects of RC delay. Section 5 on page 8 describes a-Si AMLCDs in which the gate bus-line material is MoTa alloy, Cr, or low-resistivity Al film. Section 5 also describes self-alignment fabrication of a-Si TFTs, and discusses the relationship between aperture ratio and gate bus-line sheet resistivity, mentioning that an aluminum gate-line is popular. FIG. 11 shows a schematic cross section of a poly-Si TFT AMLCD, described in section 7. Section 7 mentions that poly-Si TFTs allow fabrication of driver circuits and a TFT cell array on the same glass substrate. FIG. 12 shows a double-gate poly-Si TFT to reduce leakage current.